Rajeev Gandhi Memorial
College Of Engineering & Technology
Autonomous Institution
Approved by AICTE - New Delhi
Affiliated to JNTUA Anantapuramu
Counselling Code:

RGIT

Incubation Centers

Mechanical Engineering

The Department of Mechanical Engineering has been functioning since the inception of the Institute i.e, 1995 and is offering B.Tech course in Mechanical Engineering with an intake of 180 & M.Tech in Machine Design with an intake of 18. The department has been recognized as a research centre by JNTUA-Ananthapuramu to carryout Ph.D on regular basis. The department is organized in four sections. Each section represents the technical back ground and core competent areas of the department.

Internal Combustion Engines

The section of internal combustion engines focus on performance enhancement of an I.C engine using Bio-fuels. Design modifications of an I.C engines for clean combustion and also optimization of control parameters to achieve optimum output.

Section Head:
Dr. K. Thirupathi Reddy
Professor of ME
kotatreddy@gmail.com
+91 9866308419

Composite Materials

In this modern era, composite materials have been widely used in variety of engineering applications because of its unusual combination of properties as compared to conventional materials. Composite Material section focused its attention towards design and development of bio-degradable composite materials.

Section Head:
Dr. Syed Altaf Hussain
Professor of ME
rgmaltaf1@gmail.com
+91 9494738100

Solar Thermal Systems

Solar thermal system deals with heating and cooling process integration by using solar thermal energy supply system. It deals with applications like solar dryer, solar desalination, solar thermal storage, waste heat recovery and solar power generation etc.

Section Head:
Dr. V. Siva Reddy,
Professor of ME
vundelaap@gmail.com
+91 9898722118

Food Processing

Food processing section focus on the development of protocol to develop an alternative source for animal milk. Special attention is made to produce high protein milk from vegetarian seeds (Soy beans).

Electronics & Communications Engineering
Nanotechnology Incubation Centre (NIC)

Vision:
To facilitate and support the generation of expertise and knowledge in Nanoelectronics through participation and utilization of the facilities established at the incubation center for Nano electronic research at RGM group of institutions by both internal and external users.

Section Head:
Dr. V. Ramesh Kumar,
ramesh408@rgmect.edu.in

Objective:
The long term objective of this center has been to investigate electronic materials and device fabrication processes for scaling down integrated circuits.

  1. To promote and implement the research practices on Nanoelectronics by train the researchers in updated technologies through workshops.
  2. To encourage the projects of researchers, faculty and students from different departments, as well as different institutions, especially remote areas in the country.
  3. To invite topical and theme based proposals from researchers time to time.
  4. Research and Development activities on Nanoelectronics materials for electronics devices and sensors simulations.
  5. The other relevant themes also include namely bio-electronics and alternate energy sources; those who have a common thread of solving problems related to improving economic and human conditions

Facilities Available:

  1. Workstations with Intel Xeon processors for high speed computations
  2. Licensed Quantumwise ATK simulation tool kit
  3. Licensed professional version visual TCAD for both 2D and 3D device simulation.
  4. Symica for VLSI circuit simulations.

Currently Focusing Targets:

  1. Design of novel nanotransistor to avoid the short channel effects which are occurred in conventional MOS transistor.
  2. Carbon nanotube (CNT) based through silicon via (TSVs) Design for future 3D Integrated Circuits.
  3. Development of chemical sensor to detect warfare nerve agents and its simulants.
  4. RF energy harvesting for remotely powered system using nanoelectronics.
  5. Ternary logic circuit and interconnect design for high speed VLSI circuits.